首页> 外文期刊>IEEE Transactions on Electron Devices >Reliability Modeling and Analysis of Hot-Carrier Degradation in Multiple-Fin SOI n-Channel FinFETs With Self-Heating
【24h】

Reliability Modeling and Analysis of Hot-Carrier Degradation in Multiple-Fin SOI n-Channel FinFETs With Self-Heating

机译:自加热多鳍SOI n沟道FinFET载流子退化的可靠性建模与分析

获取原文
获取原文并翻译 | 示例

摘要

A comprehensive study on hot-carrier degradation (HCD) mechanisms in 14 nm silicon-on-insulator (SOI) n-channel FinFETs is presented. The impact of high-frequency AC stress bias on self-heating (SH) enhanced hot-carrier injection in oxide bulk traps is investigated and compared with the measurement results using the conventional DC stress bias. The influence of SH on electrical parameter degradation due to hot-carriers is shown as an important metric for accurate device reliability analysis. The relative contribution of bulk and interface traps is determined to identify the dominant mechanism responsible for HCD for different device geometries. The device behavior is thoroughly studied under hot-carrier DC and AC stresses for different device design parameters, such as effective oxide thickness, number of fins, and channel length. Based on measured data, we have proposed an empirical model for reliability degradation, which takes into account some of the key device design parameters and stress bias frequency.
机译:提出了对14 nm绝缘体上硅(SOI)n通道FinFET中热载流子降解(HCD)机理的全面研究。研究了高频交流应力偏置对氧化物体阱中自热(SH)增强的热载流子注入的影响,并与使用常规直流应力偏置的测量结果进行了比较。 SH对由于热载流子引起的电参数降级的影响被显示为精确设备可靠性分析的重要指标。确定体陷阱和界面陷阱的相对贡献,以确定对于不同器件几何结构负责HCD的主导机制。在热载流DC和AC应力下针对不同的器件设计参数(例如有效氧化物厚度,鳍片数量和沟道长度)对器件行为进行了深入研究。基于实测数据,我们提出了可靠性下降的经验模型,其中考虑了一些关键器件设计参数和应力偏置频率。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号