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The impact of self-heating and its implications on hot-carrier degradation - A modeling study

机译:自加热的影响及其对热载体降解的影响 - 建模研究

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A combination of hot-carrier degradation (HCD) and self-heating (SH) was acknowledged to be the most detrimental reliability issue in ultra-scaled field-effect-transistors (FETs) with confined architectures, such as fin and nanowire (NW) FETs. Although the view on whether SH accelerates or inhibits HCD in n-channel devices is controversial, it is commonly accepted that in p-channel FETs HCD becomes more pronounced due to SH. Therefore, we develop a framework for modeling coupled HCD and SH and validate it against experimental data acquired in p-channel Si NWFETs. This framework incorporates a carrier transport solver linked to a solver for the lattice heat flow equation; the latter solver allows one to evaluate a non-uniform lattice temperature distribution in the device. Carrier energy distribution functions obtained considering coordinate-dependent lattice temperature are used to calculate the rates of the multiple- and single-carrier processes of Si-H bond dissociation. In addition to perturbation of carrier transport by SH, elevated lattice temperature results in enhancement of the thermal contribution to the bond rupture rate and shortens vibrational lifetime of the Si-H bond, thereby reducing the multiple-carrier process rate. All these three aspects are captured by our framework, importance of each of them is analyzed, and our approach was shown to accurately reproduce experimental data.
机译:热载体降解(HCD)和自加热(SH)的组合被认为是具有密闭架构的超缩放场效应晶体管(FET)中最有害的可靠性问题,例如鳍和纳米线(NW) FET。虽然SH加速或抑制N沟道器件中的HCD是有争议的,但通常接受在P沟道FETS中,由于SH,HCD变得更加明显。因此,我们开发了一种用于建模耦合HCD和SH的框架,并针对在P沟道SI nWFET中获取的实验数据进行验证。该框架包括与晶格热流程的求解器连接的载波运输求解器;后一求解器允许人们评估装置中的不均匀晶格温度分布。考虑坐标依赖性晶格温度获得的载波能量分布功能用于计算Si-H键解离解的多载体和单载流程的速率。除了SH的载流子传输的扰动之外,稍微的晶格温度导致对粘合率的热贡献的提高,缩短Si-H键的振动寿命,从而降低了多载流量的速率。所有这三个方面都被我们的框架捕获,分析了每个各个的重要性,并显示了我们的方法来准确地再现实验数据。

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