Evidence of two-dimensional carrier confinement in thin n-channel SOI gate-all-around (GAA) devices

摘要

The effect of two-dimensional electron confinement is observed in thin-film, gate-all-around SOI transistors operated at low temperature. Physical 3D confinement in a thin silicon film using the silicon/gate oxide potential barrier (in contrast to heterojunction or electrostatic confinement) is shown for the first time. In these devices volume inversion gives rise to a 2DEG, and the population of the energy subbands can be controlled by the gate voltage. The position of transconductance peaks and valleys, corresponding to the population of different subbands as the gate voltage is increased, is in good agreement with theoretical predictions.