Elimination of Poly-Si Gate Depletion for Sub-65-nm CMOS Technologies by Excimer Laser Annealing

摘要

Pulsed excimer laser annealing (ELA) is used to reduce the poly-Si gate depletion effect (to < 0.1 nm). Low resistivity (0.58 mΩ·cm) and high active boron concentration (4×10{sup}20 cm{sup}(-3)) at the gate-oxide interface are achieved while preserving the gate oxide quality and avoiding boron penetration, to meet International Technology Roadmap for Semiconductors requirements for sub-65-nm CMOS technology nodes. ELA is compatible with high-κ dielectric (HfO{sub}2) and results in significantly lower gate leakage current density as compared with rapid thermal annealing (RTA).