High-Linearity Performance of 0.13-$muhboxm$CMOS Devices Using Field-Plate Technology

摘要

This letter presents high-linearity 0.13-$muhboxm$CMOS devices based on field-plate technology. The field-plate technology reduces the electric field between the gate and drain terminals, subsequently forming a field-plate-induced depletion region and reducing the leakage current to significantly improve linearity and power of the CMOS devices. The third-order intermodulation product of 0.13-$muhboxm$NMOS devices with and without field-plate technology are$-$41.8 and$-$32.4 dBm, respectively, for input power of$-$10 dBm. Experimental results indicate that the fieldplate architecture exhibits high linearity and power for CMOS RFIC applications.