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High-voltage DMOS integrated circuits using floating-gate protection technique

机译:使用浮栅保护技术的高压DMOS集成电路

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摘要

An efficient low power protection scheme for thin gate oxide of high voltage (HV) DMOS transistor is presented. To prevent gate-oxide breakdown and protect HV transistor, the voltage controlling its gate must be within 5 V from the HV supply. Thus signals from the low voltage domain must be level shifted to control the gate of this transistor. Usually this level shifting involves complex circuits that reduce the speed besides requiring of large power and area. In this paper, a simple and efficient protection technique for gate-oxide breakdown is achieved by connecting a capacitor divider structure to the floating-gate node of HV transistor to increase its effective gate oxide thickness. Several HV circuits, including: positive and negative HV doublers and level-up shifters suitable for ultrasound sensing systems are built successfully around the proposed technique. These circuits were implemented with 0.8 μm CMOS/DMOS HV DALSA process. Simulation and experimental results prove the good functionality of the designed HV circuits using the proposed protection technique for voltages up to 200 V. Keywords High voltage DMOS technology - ICs for sensing applications - DC–DC converter - Gate oxide protection
机译:提出了一种有效的低电压保护方案,用于高压DMOS晶体管的薄栅氧化物。为防止栅极氧化物击穿并保护HV晶体管,控制其栅极的电压必须与HV电源相差5V。因此,来自低电压域的信号必须进行电平移位,以控制该晶体管的栅极。通常,这种电平转换涉及复杂的电路,这些电路除了需要大功率和大面积之外,还会降低速度。在本文中,通过将电容器分压器结构连接到HV晶体管的浮栅节点以增加其有效栅氧化物厚度,可以实现一种简单有效的栅氧化物击穿保护技术。围绕所提出的技术成功构建了几种高压电路,包括:正,负高压倍增器和适用于超声感测系统的升压转换器。这些电路采用0.8μmCMOS / DMOS HV DALSA工艺实现。仿真和实验结果证明,使用所建议的200 V以下电压保护技术,高压电路具有良好的功能。关键词高压DMOS技术-感测应用IC-DC-DC转换器-栅极氧化保护

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