首页> 外国专利> High-voltage (HV) current-mirror circuit arrangement e.g. for integrated circuits - includes fifth transistor connected into circuit as diode connected to drain-source circuit of first DMOS-transistor having reference potential applied to its gate

High-voltage (HV) current-mirror circuit arrangement e.g. for integrated circuits - includes fifth transistor connected into circuit as diode connected to drain-source circuit of first DMOS-transistor having reference potential applied to its gate

机译:高压(HV)电流镜电路装置,例如用于集成电路-包括连接到电路中的第五晶体管,作为连接到第一DMOS晶体管的漏-源电路的二极管,二极管的参考电位施加到其栅极

摘要

A current mirror arrangement has forward biassed diode (5) carrying a first current (i1), a first transistor (1) with reference potential (6) applied to its gate and its drain-source circuit connected between a diode (5) terminal and an input terminal (7) for feeding an input current (ie) into the diode (5). A second transistor (2) has its gate terminal coupled to one terminal of the diode (5) and its drain-source circuit connected between the other terminal of the diode (5) and an output terminal (8) for outputting an output current (ia) in a given first ratio to the first current (i1) A third transistor (3) has its gate terminal coupled to one terminal of the diode (5), and its drain-source circuit connected between the other terminal of the diode (5) and one terminal for outputting a second current (i2) in a given second ratio to the first current (i1). A fourth transistor (4), has the second current (i2) as well as a third current (i3) at a given second ratio to the input current fed into its drain, and its drain- source circuit connected between the other terminal of the diode (5) and the input terminal (7).
机译:电流镜装置具有承载第一电流(i1)的正向偏置二极管(5),具有施加到其栅极的参考电势(6)的第一晶体管(1)以及其漏极-源极电路连接在二极管(5)端子和用于将输入电流(即)馈入二极管(5)的输入端子(7)。第二晶体管(2)的栅极端子耦合到二极管(5)的一个端子,其漏极-源极电路连接在二极管(5)的另一端子和输出端子(8)之间,用于输出输出电流( ia)与第一电流(i1)的比例为给定的第一比例。 5)和用于以给定的第二比率与第一电流(i1)输出第二电流(i2)的端子。第四晶体管(4)具有第二电流(i2)和第三电流(i3),与输入到其漏极的输入电流成给定的第二比率,并且其漏极-源极电路连接在晶体管的另一端之间。二极管(5)和输入端子(7)。

著录项

  • 公开/公告号DE10006971A1

    专利类型

  • 公开/公告日2001-08-30

    原文格式PDF

  • 申请/专利权人 INFINEON TECHNOLOGIES AG;

    申请/专利号DE2000106971

  • 发明设计人 SCHIMPL ANDREAS;

    申请日2000-02-16

  • 分类号G05F3/26;

  • 国家 DE

  • 入库时间 2022-08-22 01:09:59

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