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三维集成封装中的TSV互连工艺研究进展

         

摘要

To meet the growing trend of Moore’s Law, chip technology has come“More than Moore”era of 3D integration. Further miniaturization of electronic systems and performance, 3D integration solution is needed more and more. As for the demand-driven, the through-silicon vias(TSV)interconnect technology emerged as the three-dimensional integration and it is one of key techniques for 3D integration and wafer-level packaging. TSV integration is compared with raditional assembly methods, there are several advantages to adopt this technology. The main ones are: reduction of interconnects length, electrical performance improvement induced and wider range of possibilities for heterogeneous integration. 3D integration would then allow to build systems including several families of components usually hardly compatible, like RF devices, memory, logic and MEMS. In this paper, nearly two years of foreign literature about 3D-TSV integrated interconnect technology and processes are summarized, the future trend of technology is discussed.%  为顺应摩尔定律的增长趋势,芯片技术已来到超越“摩尔定律”的三维集成时代.电子系统进一步小型化和性能提高,越来越需要使用三维集成方案,在此需求推动下,穿透硅通孔(TSV)互连技术应运而生,成为三维集成和晶圆级封装的关键技术之一.TSV集成与传统组装方式相比较,具有独特的优势,如减少互连长度、提高电性能并为异质集成提供了更宽的选择范围.三维集成技术可使诸如RF器件、存储器、逻辑器件和MEMS等难以兼容的多个系列元器件集成到一个系统里面.文章结合近两年的国外文献,总结了用于三维集成封装的TSV的互连技术和工艺,探讨了其未来发展方向.

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