Based on SMIC 0.18 μm CMOS process, a LDO linear regulator with two-stage error amplifier is designed. The two error amplifiers installed in series is adopted to improve the transient response of the LDO and applies Miller frequency compensation to improve stability of the circuit. The main amplifier which uses the standard folding cascode amplifier determines the main properties of the circuit. And the second stage using fast amplifier monitors the variation of the LDO output voltage. The simulation results show that the output voltage is 1.8 V and its temperature coefficient is 10×10-6/℃ under the power supply of 5 V, the linear transient response is 48 mV when the power supply voltage changes from 4.5 V to 5.5 V, the load transient response is 5 mV when the load current changes from 0 to 60 mA, the phase margin is 74°, and the quiescent current of the entire circuit is 37 μA. The transient voltage of this circuit is far less than the other previous circuits, and low-power supply can be achieved.%基于SMIC 0.18 μm CMOS工艺,设计了一种两级误差放大器结构的LDO稳压器.该电路运用两级误差放大器串联方式来改善LDO的瞬态响应性能,采用米勒频率补偿方式提高其稳定性.两级放大器中主放大器运用标准的折叠式共源共栅放大器,决定了电路的主要性能参数；第二级使用带有AB类输出的快速放大器,用来监控LDO输出电压的变化,以快速地响应此变化.电路仿真结果显示:在电源电压为5V时,输出为1.8V,输出电压的温度系数为10×10-6/℃；当电源电压从4.5V到5.5V变化时,线性瞬态跳变为48 mV；当负载电流从0 mA到60 mA变化时,负载瞬态跳变为5 mV.且环路的相位裕度为74°,整个电路的静态电流为37 μA.该电路结构的瞬态跳变电压值远小于其他电路结构,且能实现低功耗供电.
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