REDUCTION OF DYNAMIC LEAKAGE CURRENT FOR 0.18μm SOI DEVICES BY USING RETROGRADED CHANNEL STRUCTURE

摘要

The behavior of dynamic leakage current (DLC) in 0.18μm silicon-on-insulator (SOI) MOS transistors with uniformly doped channel and super steep retrograde (SSR) channel was investigated by pulsed I-V measurement and MEDICI device simulation. For a uniform doped channel structure, a SOI device with the SOI thickness 150nm had the maximum DLC, which decreased for thinner and thicker SOI devices than the 150nm SOI. For a SSR channel structure, the DLC linearly decreased with increasing the SOI thickness and could be effectively reduced compared to the uniform structure. For thinner SOI devices, DLC was mainly dependent on the accumulated hole concentration. On the contrary, for thicker SOI devices, DLC was dominant on the body-to-source potential. It is concluded that the use of a thicker SOI with SSR channel structure is an effective method for reducing the DLC in SOI MOS transistors.