A high density 4Mbit dRAM process using a fully overlapping bitline contact (FoBIC) trench cell

摘要

The key issue in the down scaling of dRAM cells (see review of 3-dimensional cell structures in /1/) is to preserve the cell capacitance at a smaller cell area. In this paper we report a 4Mbit dRAM using a depletion type trench cell and a bitline contact technology for which the bitline contact (FOBIC) can fully overlap gate and field oxide regions. Compared to a conventional contact technique the FOBIC cell saves about 20 percent of the cell area. No additional masks are required.