Modeling the floating-body-effect-induced drain current behavior of PD SOI NMOS device via SPICE BJT/MOS model approach

机译：通过SPICE BJT / MOS模型方法对PD SOI NMOS器件的浮体效应引起的漏极电流行为进行建模

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• Poly-TFT and PD SOI have a lot in common •Floating-Body-Related Kink Effects are difficult to Model •SPICE Bipolar/MOS Approach is Effective

机译：•Poly-TFT和PD SOI有很多共同点•浮体相关的扭结效应很难建模•SPICE双极/ MOS方法有效

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《Modeling for Circuit Simulation, 2009. TFT/CTFT '09》|2009年|1-29|共29页
会议地点 London(GB);London(GB)
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Su J. S.; Kuo James B.;
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National Taiwan University, Taiwan;

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1. Closed-form breakdown voltage model for PD SOI NMOS devices considering impact ionization of both parasitic BJT and surface MOS channel simultaneously [J] . Shih-Chia Lin, Kuo J.B. IEEE Transactions on Electron Devices . 2002,第11期

机译：同时考虑寄生BJT和表面MOS沟道的碰撞电离的PD SOI NMOS器件的闭合形式击穿电压模型
2. An analytical drain current model considering both electron and lattice temperatures simultaneously for deep submicron ultrathin SOI NMOS devices with self-heating [J] . Yu-Guang Chen, Shyh-Yih Ma IEEE Transactions on Electron Devices . 1995,第5期

机译：具有自发热功能的深亚微米超薄SOI NMOS器件同时考虑电子和晶格温度的分析漏极电流模型
3. Gate tunneling leakage current behavior of 40 nm PD SOI NMOS device considering the floating body effect [J] . H.J. Hung, J.B. Kuo, D. Chen, Microelectronics reliability . 2010,第5期

机译：考虑浮体效应的40 nm PD SOI NMOS器件的栅隧穿漏电流行为
4. Modeling the floating-body-effect-induced drain current behavior of PD SOI NMOS device via SPICE BJT/MOS model approach [C] . Compact Thin-Film Transistor Modeling for Circuit Simulation . 2009

机译：通过Spice BJT / MOS模型方法建模PD SOI NMOS器件的浮体效应诱导的漏极电流行为
5. Characterization and modeling of scaled NMOS devices with high-K dielectrics and metal gate electrodes [D] . Zhang, Yanli 2008

机译：具有高K电介质和金属栅电极的按比例缩放的NMOS器件的表征和建模
6. Data modeling positive security behavior implementation among smart device users in Indonesia: A partial least squares structural equation modeling approach (PLS-SEM) [O] . Kautsarina, Achmad Nizar Hidayanto, Bayu Anggorojati, 2020

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Modeling the floating-body-effect-induced drain current behavior of PD SOI NMOS device via SPICE BJT/MOS model approach

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