An analytical drain current model considering both electron and lattice temperatures simultaneously for deep submicron ultrathin SOI NMOS devices with self-heating

摘要

This paper reports a closed-form analytical drain current model considering both electron and lattice temperatures simultaneously using a quasi-two-dimensional approach for deep submicron ultrathin SOI NMOS devices. As verified by the experimental data, the closed-form analytical model shows a good predication of the negative differential resistance behavior. Based on the analytical model, with a channel length of >0.2 /spl mu/m, both the effective electron temperature and the lattice temperature are important in determining the negative differential resistance.