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Soft breakdown free atomic-layer-deposited silicon-nitride/SiO/sub 2/ stack gate dielectrics

机译:软击穿自由原子层沉积硅 - 氮化硅/ SIO / SUB 2 /堆叠栅极电介质

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An extremely-thin (0.3-0.4 nm) silicon nitride layer has been deposited on thermally grown SiO/sub 2/ by an atomic-layer-deposition (ALD) technique. The boron penetration through the stack gate dielectrics has been dramatically suppressed and the reliability has been significantly improved. An exciting feature of no soft breakdown (SBD) events is observed in ramped voltage stressing and time-dependent dielectric breakdown (TDDB) characteristics. A model has been proposed, which consistently explains the no-SBD phenomena in ALD-silicon-nitride/SiO/sub 2/ stack gate dielectrics as well as the SBD events in conventional SiO/sub 2/ dielectrics.
机译:通过原子层沉积(ALD)技术沉积了极薄的(0.3-0.4nm)氮化硅层/沉积在热生长的SiO / sub 2上/沉积物。通过堆叠栅极电介质的硼渗透已经显着抑制,并且可靠性得到了显着改善。在斜坡的电压应力和时间相关的介电击穿(TDDB)特性中,观察到没有软击穿(SBD)事件的激动特性。已经提出了一种模型,该模型始终如一地解释了ALD-硅 - 氮化物/ SIO / SUB 2 /堆叠栅极电介质中的NO-SBD现象以及传统SIO / SUB 2 /介质中的SBD事件。

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