This paper describes a method to realize sub-5nm overlay control simultaneously in two lithography fields, using the technique of topology optimization for the template design. The dual field overlay method has been developed for Jet and Flash Imprint Lithography (J-FIL), which is a specific form of Imprint Lithography [1]. J-FIL is described in detail in [2] and is being considered as a low-cost alternative to more expensive photolithography extension techniques such as self-aligned double/quadruple patterning (SADP/SAQP). Canon's J-FIL based manufacturing tools for NAND Flash and DRAM manufacturing are described in a recent paper [3].
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