Smart-cut technology used for the production of submicron SOI has developed fast during the last a few years. It has now became a standard approach to prepare integrated materials [1,2]. In this paper, a smart-cut process for the production of SOI substrate with a buried tungsten silicide layer is investigated. These substrates are employed for high frequency, low power devices. The starting substrate is 100 mm diameter p-type silicon with a resistivity of 10-15 W-cm. A WSi 2 layer of 250 nm thick was deposited by Low Pressure CVD (LPCVD). This WSi2 layer was then coated by a combination of polycrystalline silicon TEOS. The TEOS was densified and polished before ion implantation. Ion ranges were decided by SRIM96 [3] computer simulation. THe wafers were implanted a energies between 50 to 160 keV in the dose range of 4 * 10 16 to 9 * 10 16 ions/cm 2. Some H and He co-implantation smart-cut split experiments have also been conducted. Wafers were cleaned by modified RCA1 clean and the surface activated, prior to bonding by O 2 plasma exposure and DI water rinse. Active wafers were directly bonded to handle silicon having a 400 nm thick SiO2 layer. The split and bond strengthening thermal treatments were 500 0 C for up to 2 h. and 1050 0 C for 2 h. respectively. A number of reference wafer bonding tests were conducted to obtain useful data. The crack-opening method has been employed to measure the bonding energies. The results show that the with modified RCA1 cleaned only, bonding is not strong enough to transfer layer. Only some flacks were layer. Oxygen plasma activation of the bonding surface is crucial in this process. In this paper we will show that SOI with buried tungsten silicide structure could be fabricated by smart-cut process. Bonding process incorporates standard IC compatible layers.
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