首页> 外文会议>International Symposium on Silicon-on-Insulator Technology and Devices >ELECTRICAL PROPERTIES OF METAL-BURIED OXIDE-SILICON STRUCTURES FABRICATED BY LOW DOSE SIMOX PROCESS
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ELECTRICAL PROPERTIES OF METAL-BURIED OXIDE-SILICON STRUCTURES FABRICATED BY LOW DOSE SIMOX PROCESS

机译:低剂量SIMOX工艺制造的金属埋氧化硅结构的电气性能

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Metal-buried oxide-silicon structures were fabricated for electrical and structural evaluation of buried oxide (BOX) synthesised by Low Dose SIMOX process. The total BOX/Si substrate interface charge was ~3x10~(10) cm~(-2) while the density of interface states was D~(it) (cm~(-2) eV~(-1)) ≈ 5Xl0~(12). The substrate doping profile was found to be unaffected by the high temperature process needed for SIMOX fabrication. A minority carrier trap was detected by Deep Level Transient Spectroscopy (DLTS). This trap is seated ~300meV above the valence band and is probably due to stacking faults lying near the interface. By applying Generation-DLTS, the minority carrier generation lifetime at different temperatures was estimated. The calculated values are in the order of 10~(-2)-10~(-1) * s and suggest a degraded quality of the area below the BOX. The results obtained here are compared with those reported for high dose SIMOX material.
机译:用低剂量SIMOX工艺合成的掩埋氧化物(箱)的电气和结构评估制造金属掩埋氧化硅结构。总箱/ Si衬底接口电荷为〜3x10〜(10)cm〜(-2),而界面状态的密度为d〜(它)(cm〜(-2)ev〜(-1))≈5xl0〜 (12)。发现衬底掺杂曲线不受SIMOX制造所需的高温过程的影响。通过深度瞬态光谱(DLT)检测少数型载体捕集物。该陷阱在价带上方〜300mev,可能是由于界面附近的堆叠故障。通过施加生成-DLT,估计不同温度下的少数载波生成寿命。计算值的量级为10〜(-2)-10〜(-1)* s,并提出了盒子下方区域的降级质量。这里获得的结果与高剂量Simox材料报告的结果进行了比较。

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