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Numerical extraction of capacitance in a-Si thin-fim transistors

机译:A-Si薄膜晶体管电容的数值提取

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We present a new comptuational approach for extracting the quasistatic parasitic coupling capacitance associiated with geometric overlappling in amporphous silicon (a-Si) thin-film transistors (TFTs). The method is based on efficient evaluation of the three-dimensional potential and the electric field using expenential expansion of the Green's function 1/r to facilitate accurate large-scale parasitic capacitance ex-traction in complex device structures and arrays. using this technique, we study the effect of the fringing field for the case of small overlap length and that of substrate perimittivity on the overlap capacitance in TFTs. The fringing field results in non-trivial capacitance even with non-overlapping structures and the capacitance is found to increase w ith perimittivity of the sustrate.
机译:我们提出了一种用于提取与在随访硅(A-Si)薄膜晶体管(TFT)中的几何重叠相关的Quasistatic寄生耦合电容的新的寄生耦合电容。该方法基于使用绿色函数1 / r的Compenence扩展的三维电位和电场的高效评估,以便于复杂的装置结构和阵列中精确大规模的寄生电容。使用这种技术,我们研究了RFT在TFT中的重叠电容上的小重叠长度和基板周边度的情况下的效果。即使具有非重叠结构,并且发现电容也会导致非平凡的电容,并且发现避免的周边度增加。

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