Low temperature (800° C) recessed junction selectivesilicon-germanium source/drain technology for sub-70 nm CMOS

摘要

We present a novel, low-temperature source/drain junction andcontact formation technology applicable to sub-70 nm CMOS. In thisprocess, in-situ boron doped SiGe is selectively deposited at 500° Cin the source/drain windows recessed to the desired junction depth. Thetechnology meets the NTRS roadmap requirements for (i) junctiondepth/sheet resistance (<100 Ω/sq. for 30 nm junctions), (ii)ultra-low resistivity contacts (1.5×10-8Ω-cm2), (iii) excellent reverse leakage characteristics(less than 1% of the I_OFF budget), (iv) perfect box-shapedlateral abruptness and (v) thermal integration compatibility with high-kgate dielectrics using the conventional (gate-last) CMOS process flow