Application of Single Pulse Dynamics to Model Program and Erase Cycling-Induced Defects in the Tunnel Oxide of Charge-Trapping Devices

摘要

3D NAND, the mainstream technology for high density Flash application [1], is typically based on the charge trapping paradigm, i.e. it relies on the storage of information as electrons trapped in a charge trapping layer (CTL). The useful life of these devices is limited by the number of program and erase (P/E) operations, because repeated tunneling of electrons and holes progressively creates defects in the tunneling dielectric (TuOx) that increase the charge leakage from the CTL, compromising retention. In this paper we propose a model that describes the creation of traps in TuOx according to the degradation dynamics within each pulse of a P/E cycle, unlike previous models that describe the creation of traps only as a function of the number of P/E cycles [2]. This enables a precise calculation of created traps in TuOx based on arbitrary stress pulses and workloads.