Effect of Interface Traps Parameters on Admittance Characteristics of the MIS (Metal-Insulator-Semiconductor) Tunnel Structures

摘要

Interface traps density (N_(it)) and gate insulator thickness (t_(ox)) impact on MIS tunnel structure electrical characteristics is discussed in respect to bias voltage range corresponding to inversion in the semiconductor substrate region. Effect of N_(it) and t_(ox) on equilibrium and non-equilibrium operation regime of the device is presented. Different models of the small-signal response of interface traps are proposed and discussed in respect to several phenomena related to the traps charging and discharging processes. Presented analysis was performed for the MIS structures with the gate dielectric made of silicon dioxide (SiO_2) and hafnium oxide (HfO_x). The obtained results proved that the surface density of interface traps (N_(it)) and the insulator thickness (t_(ox)) have correlated impact on the transition between equilibrium and non-equilibrium operation of the MIS tunnel structures.