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FinFET stressor efficiency on alternative wafer and channel orientations for the 14 nm node and below

机译:14nm及以下节点的替代晶圆和通道方向上的FinFET应力源效率

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This simulation work studies whether optimal wafer and channel orientations exist that maximize the mobility of 10 nm-node strained-silicon FinFETs. For NFinFETs, strain-relaxed buffers or source/drain stressors yield the highest mobilities on rotated-notch wafers. For PFinFETs, industry-standard directions give the highest mobilities when using SiC strain-relaxed buffers as a stress booster. Using {110} substrates leads to strained mobilities that are in between what can be obtained by industry-standard and rotated-notch directions.
机译:这项仿真工作研究了是否存在最佳的晶圆和通道方向,以最大程度地提高10 nm节点应变硅FinFET的迁移率。对于NFinFET,松弛应变缓冲器或源极/漏极应力源在旋转缺口晶圆上具有最高的迁移率。对于PFinFET,当使用SiC应变松弛缓冲器作为应力增强器时,行业标准说明提供了最高的迁移率。使用{110}基材会导致迁移率介于行业标准和旋转缺口方向之间。

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