Gate oxide defectiveness levels: an experimental comparison between Planar and Trench Low Voltage Power MOSFET technologies

摘要

Gate oxide reliability of Power MOSFETs strongly depends on their defectiveness levels. Higher defectiveness levels could involve in higher gate leakage current, threshold voltage shift effects and lower oxide reliability. Therefore, it is important to evaluate gate oxide defectiveness. This paper estimates the different oxide defectiveness levels of two main topologies utilized in Low Voltage Power MOSFETs and it shows how the Trench compared to the Planar oxide shows higher defectiveness levels especially considering interface traps.