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Low voltage MOS gate controlled semiconductor component, useful for a direct voltage/direct voltage converter, employs planar strip technology and has a minimal power index

机译:适用于直流电压/直流电压转换器的低压MOS栅极控制的半导体组件采用平面剥离技术,并且具有最小的功率指标

摘要

A MOS gate controlled semiconductor component having gate strips (61) lying over invertible channel region pairs formed by source diffusions (81) in parallel spaced-apart base strip diffusions (80) is new. A semiconductor component with MOS gate control comprises a silicon wafer with an upper first conductivity type layer (52) accommodating boundary layers. Parallel spaced-apart second conductivity type base strip diffusions (80) are formed in the upper surface of the layer (52) and first conductivity type source diffusions (81) are formed in and extend over the same length as the base strip diffusions (80) to form invertible channel regions (82) along the sides of each of the base strip diffusions (80). Gate strips, comprising gate oxide strips covered by conductive polysilicon strips (61), lie over spaced-apart pairs of adjacent invertible channel regions (82) and the space between their respective base diffusions (80). Independent claims are also included for the following: (i) a process for producing the above component; and (II) a d.c./d.c. converter circuit employing components as described above.
机译:新型的具有栅极条(61)位于可逆沟道区对上的MOS栅极控制的半导体元件是由源极扩散(81)在平行隔开的基带扩散(80)中形成的。具有MOS栅极控制的半导体组件包括硅晶片,该硅晶片具有容纳边界层的上部第一导电类型层(52)。在层(52)的上表面中形成有平行间隔开的​​第二导电类型基带扩散(80),并且在与该基本带扩散(80)相同的长度上形成并延伸第一导电类型的源扩散(81)。 )沿每个基带扩散(80)的侧面形成可逆沟道区(82)。包括由导电多晶硅条(61)覆盖的栅氧化条的栅条位于间隔成对的相邻的可逆沟道区(82)及其相应的基极扩散区(80)之间的空间上。还包括以下方面的独立权利要求:(i)生产上述组分的方法;和(II)直流电/直流电转换器电路,采用上述元件。

著录项

  • 公开/公告号DE19953620A1

    专利类型

  • 公开/公告日2000-05-11

    原文格式PDF

  • 申请/专利权人 INTERNATIONAL RECTIFIER CORP. EL SEGUNDO;

    申请/专利号DE1999153620

  • 发明设计人 HERMAN THOMAS;

    申请日1999-11-08

  • 分类号H01L29/78;H01L27/088;H02M3/10;H01L21/336;

  • 国家 DE

  • 入库时间 2022-08-22 01:41:58

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