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A novel cylinder-type MIM capacitor in porous low-k film (CAPL) for embedded DRAM with advanced CMOS logics

机译:具有高级CMOS逻辑的嵌入式DRAM的多孔低k薄膜(CAPL)中的一种新型气缸型MIM电容器

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A novel cylinder-type metal-insulator-metal (MIM) capacitor in porous low-k film (CAPL) is proposed for embedded DRAMs (eDRAMs). The CAPL removes long bypass-contacts (BCT) with high resistance, which have been used to connect transistors with Cu interconnects by way of the MIM capacitor layer. A key technical challenge for the CAPL integration is control of pore structure in the low-k film to avoid metal contamination during the gas-phase deposition of the MIM electrode (BE) on the porous low-k film. A molecular-pore-stack (MPS) SiOCH film (k=2.5) with very small pores (0.4 nm-diameter) is found to be the best candidate for the CAPL structure, applicable to eDRAM with high performance logics for 28 nm-node and beyond.
机译:提出了一种新型气缸型金属 - 绝缘体 - 金属(MIM)电容器,用于嵌入式DRAM(EDRAM)。 CAPL去除具有高电阻的长旁路 - 触点(BCT),这已被用于通过MIM电容器层与CU互连的晶体管连接。 CAPL集成的关键技术挑战是控制低k薄膜的孔结构,以避免在多孔低k膜上的MIM电极的气相沉积期间金属污染。发现具有非常小的孔(0.4nm-Digal)的分子孔叠层(MPS)SiOCH膜(K = 2.5)是CAPL结构的最佳候选者,适用于具有高性能逻辑的EDRAM,用于28 NM节点超越。

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