Predictive full circuit ESD simulation and analysis using extended ESD compact models: Methodology and tool implementation

摘要

We present a new ESD compact modeling methodology using Verilog-A to enable predictive full circuit ESD simulation along with supporting hardware and failure analysis results. We also present a new ESD tool (ESTEEM) to automate the ESD design simulation and optimization flow for circuit designers. Test results show excellent simulation to hardware data correlation.