首页> 外文会议>Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International >Systematic study of work function engineering and scavenging effect using NiSi alloy FUSI metal gates with advanced gate stacks
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Systematic study of work function engineering and scavenging effect using NiSi alloy FUSI metal gates with advanced gate stacks

机译:使用具有先进栅叠层的NiSi合金FUSI金属栅对功函数工程和清除效果的系统研究

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We present a systematic examination of work function modulation and scavenging effect on fully silicided gates using different NiSi alloys (Ti, Hf, Zr, Pd, Pt, and Al) as well as different phases (Ni31Si12 and Nirich-Pt-Si). It is shown that the interface layer between gate FUSI and dielectric is the key to modulate the work function. FUSI alloys were able to prevent Fermi level pining on HfSiO and HfO2 by modification of the top interface. A ~400 meV work function shift was achieved toward the conduction band edge using NiAlSi demonstrating a mobility of 300 cm2/Vs at peak, matching NiSi control devices on Hfx SiOy. Interface engineering with FUSI alloy gate has not only shown threshold voltage modulation but also enabled further gate oxide scaling (0.15 ~ 0.2nm) compared to NiSi control device. Additional gate oxide scaling is due to the increase of effective dielectric constant in the FUSI gate stack. TEM, EELS, and EDX showed that work function modulation is attributed to the Al pile up at interface. Ni rich silicide FUSI gates showed a ~250mV shift from mid gap toward valence band edge with elimination of Fermi-level pining by modification of the top dielectric interface
机译:我们对使用不同NISI合金(Ti,HF,Zr,Pd,Pt和Al)以及不同相的完全硅化栅极的工作功能调制和清除效果的系统检查以及不同的相(Ni 31 si 12 和ni 富含 -pt-si)。结果表明,栅极Fusi和电介质之间的界面层是调制工作功能的键。通过修改顶部接口,Fusi合金能够防止在HFSIO和HFO 2 上的Fermi水平。使用NIALSI朝向导电带边缘实现了〜400meV功函数偏移,证明了峰值的300cm 2 / vs的迁移率,匹配了HF x siO上的NISI控制装置 y 。与Fusi合金门的界面工程不仅显示了阈值电压调制,而且与NISI控制装置相比,还使进一步的栅极氧化物缩放(0.15〜0.2nm)。额外的栅极氧化物缩放是由于Fusi栅极堆叠中有效介电常数的增加。 TEM,EEL和EDX显示,工作功能调制归因于AL在接口上堆叠。 Ni纯硅化物Fusi栅极显示〜250mV从MID间隙转向价带边缘,通过修改顶部介电接口消除FERMI级PINING

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