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Multi-bit memories fabricated through mechanical and plasma induced deformation of layered semiconductors

机译:通过机械和等离子体诱导的层状半导体变形制造的多位存储器

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To realize hardware-based artificial intelligence (AI) systems for practical applications, it is necessary to create new memory devices with multiple (or analog-tunable) long-lasting memory states.[1] In our work, we identify that the interlayer deformation in layered semiconductors can form multiple long-lasting, metastable charge-trapping states, which can be exploited to fabricate memory transistors with multi-bit data storage states. We have demonstrated that both plasma treatment and mechanical shear exfoliation can be used to generate such charge-trapping states, and the fabricated MoS2 and WSe2 memory transistors have 2-bit and 3-bit data storage states with year- and day-scale retention times, respectively. This work advances the scientific and technical knowledge for manipulating charge memory states in layered materials and producing multi-bit memory components.
机译:为了实现用于实际应用的基于硬件的人工智能(AI)系统,有必要创建具有多个(或模拟可调)持久存储状态的新存储设备。[1]在我们的工作中,我们发现层状半导体中的层间变形会形成多个持久的亚稳态电荷陷阱态,这些态可用于制造具有多位数据存储态的存储晶体管。我们已经证明,等离子体处理和机械剪切剥离都可以用于产生这种电荷俘获状态,并且制造的MoS 2 和WSe 2 存储晶体管具有2位和3位数据存储状态,分别具有年和日规模的保留时间。这项工作提高了在分层材料中操纵电荷存储状态并生产多位存储组件的科学和技术知识。

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