首页> 外文会议>2011 12th International Conference on Electronic Packaging Technology High Density Packaging >3D modeling and electrical characteristics of through-silicon-via (TSV) in 3D integrated circuits
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3D modeling and electrical characteristics of through-silicon-via (TSV) in 3D integrated circuits

机译:3D集成电路中的硅通孔(TSV)的3D建模和电气特性

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摘要

Probably the most widely known more-than-Moore solutions is 3D chip stacking using TSV. The authors of this paper propose an equivalent circuit model of TSV and extract the values of passive elements within the model from full-wave scattering parameters simulation. Then, in order to estimate the signal distortion, the eye-diagram and TDR simulation are made and demonstrated. Additionally, transmission performance and the crosstalk of differential TSV with redistribution layer (RDL) are explored. The design rules for optimized crosstalk performance for TSVs with RDL are put forward.
机译:也许最广为人知的莫尔解决方案是使用TSV的3D芯片堆叠。本文的作者提出了TSV的等效电路模型,并从全波散射参数仿真中提取了模型中无源元件的值。然后,为了估计信号失真,进行了眼图和TDR仿真并进行了演示。此外,还探讨了传输性能以及差分TSV与重新分配层(RDL)的串扰。提出了带有RDL的TSV的优化串扰性能的设计规则。

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