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UV-NIL template for the 22nm node and beyond

机译:适用于22nm及更高节点的UV-NIL模板

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摘要

NIL (nano-imprint lithography) is expected as one of the lithographic candidates for 32nm node and beyond. Recently, the small line edge roughness (LER) as well as the potentially high resolution that will ensure no-OPC mask feature is attracting many researchers. However, the NIL needs 1X patterns on template and a transit from 4X to 1X is a big and hard technology jump for the mask industry. The fine resolution pattern making on the template is one of the most critical issues for the realization of NIL. In this paper, as a continuation of our previous works, we have achieved further resolution by optimizing the materials, their thicknesses, the developing and the etching processes, as well as the writing parameters of the 100keV SB (spot beam) writer. At the best resolved point on the template, resolutions down to hp (half pitch) 18nm on dense line patterns, hp20nm on dense hole patterns, and hp26nm on dense dot patterns were confirmed. Concerning stable pattern resolution over a certain field area, we evaluated pattern resolution through over a 250um square area, which we think would be adequate for initial imprint tests. For the 250μm square area, we confirmed pattern resolution of hp24nm for dense line patterns and hp32nm for dense hole patterns. In addition, we have studied resolution limit of the 50keV VSB (variable shaped beam) photomask production writing tools, which have been commonly used tools in the 4X photomask manufacturing for larger field size patterning. Materials, process conditions and parameters acquired through the l00keV SB process were implanted, and we could fabricate templates with hp32nm dense line patterns, with acceptable full chip uniformity and writing time. We also studied the imprint capability, and fabricated a template with fine features and imprinted it onto a wafer. As a result, we could transfer hp24nm dense line patterns, hp24nm dense hole patterns, and hp32nm dense dot patterns onto the wafer.
机译:NIL(纳米压印光刻)有望成为32nm及以后工艺的候选光刻之一。最近,小的线边缘粗糙度(LER)以及潜在的高分辨率(可确保无OPC掩模功能)吸引了许多研究人员。但是,NIL在模板上需要1X图案,从4X过渡到1X对于掩模行业来说是一项艰巨的技术飞跃。模板上的精细分辨率图案制作是实现NIL的最关键问题之一。在本文中,作为我们先前工作的延续,我们通过优化材料,厚度,显影和蚀刻工艺以及100keV SB(点光束)写入器的写入参数,实现了更高的分辨率。在模板的最佳分辨点上,确认了在密集线图案上分辨率低至hp(半节距)的分辨率为18nm,在密集孔图案上分辨率为hp20nm,在密集点图案上分辨率为hp26nm。关于在特定区域上稳定的图案分辨率,我们评估了在250um正方形区域上的图案分辨率,我们认为这对于初始压印测试是足够的。对于250μm的正方形区域,我们确认了密集线图案的分辨率为hp24nm,密集孔图案的分辨率为hp32nm。此外,我们研究了50keV VSB(可变形状光束)光掩模生产书写工具的分辨率极限,该工具是4X光掩模生产中用于较大尺寸图形构图的常用工具。植入了通过100keV SB工艺获得的材料,工艺条件和参数,我们可以制造出具有hp32nm密集线图案,具有可接受的完整芯片均匀性和写入时间的模板。我们还研究了压印功能,并制作了具有优良功能的模板并将其压印到晶片上。结果,我们可以将hp24nm密集线图案,hp24nm密集孔图案和hp32nm密集点图案转移到晶片上。

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