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High electron and hole mobility enhancements in thin-body strained Si/strained SiGe/strained Si heterostructures on insulator

机译:绝缘体上薄体应变Si /应变SiGe / Si异质结构中电子和空穴迁移率的提高

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Fully depleted MOSFETs were fabricated on strained Si/strained SiGe (46% Ge)/strained Si heterostructures on insulator (HOI) for the first time, demonstrating both high electron and hole mobility enhancements while maintaining excellent subthreshold characteristics. The total thickness of the heterostructure on insulator is less than 25 nm. At an inversion charge density of 1.5/spl times/10/sup 13/ cm/sup -2/, mobility enhancements of 90% and 107% are obtained for electrons and holes respectively. The mobility increases as the cap thickness is reduced to 2 nm. HOI offers superior hole mobility than 40% strained silicon directly on insulator at all vertical fields, when the cap thickness is below 5 nm.
机译:完全耗尽的MOSFET首次在绝缘体上的应变Si /应变SiGe(46%Ge)/应变Si异质结构(HOI)上制造,展示了高电子迁移率和空穴迁移率的增强,同时保持了出色的亚阈值特性。绝缘体上异质结构的总厚度小于25 nm。在1.5 / spl乘以10 / sup 13 / cm / sup -2 /的反转电荷密度下,电子和空穴的迁移率分别提高了90%和107%。随着盖厚度减小到2 nm,迁移率增加。当盖厚度小于5 nm时,HOI在所有垂直场上都比直接在绝缘体上的40%应变硅提供更高的空穴迁移率。

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