Flip-chip carriers have become the preferred solution for high-performance ASIC and microprocessor devices. Typically these are packaged in organic or ceramic Ball Grid Array (BGA) connections. Recently, there has been a significant focus on Pb-free packages to meet European Union mandated RoHS guidelines by 2006, with exemptions allowed for server and other networking hardware (1,2). Towards this goal, IBM has developed and qualified Pb-free and Pb-reduced packages that cover advanced semiconductor technologies such as 130nm and 90nm ground rules. In addition, for device performance reasons, the BEOL wiring layers on the high-performance 90nm or smaller ground rule devices also require low-k dielectric materials. Finally, due to tighter wiring ground rules and faster device performance requirements, the build-up laminate packages require thincore (400 um) and advanced wiring pitch in the build-up layers. IBM has partnered with Amkor Technology to qualify both 130nm and 90nm devices with Amkor developed Pb-free bumps using large die and build-up laminates, the details of which were presented at the 56th ECTC (3). The Sn-Ag Pb-free plated bumps were fabricated by Amkor on 300mm wafers with photosensitive polyimide (PSPI) passivation. Details of Amkor-Unitive plated Pb-free bump technology are discussed in Reference 4. The die size used was 14.7mm and the laminate qualified was 42.5mm with a structure of 4-2-4. We have extended the Pb-free low-k device technology to evaluate two additional elements: 65nm ground rules with enhanced low-k wiring layers on the die, and a 2-2-2 structure with thin core.
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