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Revisited Design of Short-pulse Power Gated Approach of Subthreshold Leakage Reduction Technique in Combinational Circuits

机译:组合电路中亚阈值泄漏减少技术的短脉冲功率门控方法的重新设计

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Low power consumption is the ultimate goal of the circuit designers of any application and specifically, the life time of event-driven nature of low duty cycle applications like Wireless Sensor Networks (WSN) relies on the design of power-stringent battery-operated devices. At all the hierarchical level of the sensor nodes, low duty cycling is the practicing solution in saving the unwanted power consumption. However, the rapid power squanderer at the sleep state of the circuit is the subthreshold leakage. The exact saving of the leakage can be done by suppressing the short-channel effects of the transistors only at the circuit-level and the two techniques Modified Power Gating (MPG) and Short-pulse POwer Gated Approach (SPOGA, hereafter called as SPOGA_old) are proposed and implemented in the combinational circuits in the previous works of the research. In spite of good subthreshold leakage reduction, the limitations of the proposed techniques are loading effect, state-retention and leakage estimation method. In order to provide an efficient sleep state subthreshold leakage reduction in combinational circuits of low duty cycle application, the limitations are addressed with a revisited design of SPOGA_old, called as SPOGA technique. The illustration of the proposed SPOGA technique with CMOS inverter is done using Cadence GPDK090. From the simulation results, it is clearly seen that the Subthreshold Leakage Reduction Ratio (SLRR) is high and proved the efficacy of the SPOGA technique in subthreshold leakage reduction.
机译:低功耗是任何应用电路设计人员的最终目标,特别是,低占空比应用(如无线传感器网络(WSN))的事件驱动性质的寿命取决于电池供电严格的设备的设计。在传感器节点的所有层次级别上,低占空比都是节省不必要功耗的实用解决方案。但是,电路睡眠状态下的快速功率浪费器是亚阈值泄漏。可以通过仅在电路级抑制晶体管的短沟道效应以及修改功率门控(MPG)和短脉冲功率门控方法(SPOGA,以下称为SPOGA_old)两种技术来实现泄漏的精确节省。在之前的研究中,这些电路是在组合电路中提出并实现的。尽管亚阈值泄漏降低效果良好,但所提出技术的局限性是加载效果,状态保留和泄漏估计方法。为了在低占空比应用的组合电路中提供有效的睡眠状态亚阈值泄漏减少,使用SPOGA_old的重新设计设计(称为SPOGA技术)解决了这些限制。使用Cadence GPDK090完成了带有CMOS反相器的SPOGA技术的说明。从仿真结果可以清楚地看到,亚阈值泄漏减少率(SLRR)很高,并证明了SPOGA技术在减少亚阈值泄漏方面的功效。

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