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Deep-level defects in epitaxial silicon for VLSI technology

机译:用于VLSI技术的外延硅中的深层缺陷

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摘要

Deep level transient spectroscopy (DLTS) has been employed to study nickel-related deep-level defects in epitaxial silicon used in very large-scale integration (VLSI) technology. A number of Ni-related hole traps are observed. The main hole trap in the both p/p and p/p~+ epitaxial layers is located at E_v+0.49eV. The depth profiles of the traps concentrations in the epilayers are compared.
机译:深层瞬态光谱法(DLTS)已用于研究超大规模集成(VLSI)技术中使用的外延硅中与镍有关的深层缺陷。观察到许多与镍有关的空穴陷阱。 p / p和p / p〜+外延层中的主空穴阱位于E_v + 0.49eV。比较了外延层中陷阱浓度的深度分布。

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