Integration of dielectric multi-gate transistors into a Tri-Gate Process (FINFET)

摘要

Construction element, comprehensive,a substrate (110, 410, 610) with multiple semiconductor fins (112, 212, 412, 512, 612);a first transistor (101, 201, 301, 401, 501, 601) with a first gate structure (111A),winding around one or more of the semiconductor fins, the first gate structure (111A) comprising a first dielectric gate structure in contact with one or more semiconductor fins and a first gate electrode structure (115),which has a first metal layer (131, 231, 331, 431, 531, 631) in contact with the first dielectric gate structure, the first dielectric gate structure having a high-k dielectric layer (121, 221, 321, 421, 521, 621);anda second transistor (102, 202, 302, 402, 502, 306) with a second gate structure (111B),winding around one or more of the semiconductor fins, the second gate structure having a second dielectric gate structure in contact with one or more semiconductor fins and a second gate electrode structure (115) with a second metal layer,where the second metal layer is in direct contact with the second dielectric gate structure and where the second dielectric gate structure has the high-k dielectric layer directly on a silicon dioxide layer (125, 225, 325, 425, 525), the silicon dioxide layer being directly on one or more semiconductor fins,where the second dielectric gate structure in thickness is different from the first dielectric gate structure, where the high-k dielectric layer is formed in accordance with gate structure openings of the first and second transistors,where the first transistor is a transistor suitable for a high power core and the second transistor is a transistor suitable for a high voltage input/output circuit.