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Semiconductor devices comprising unipolar hot-carrier transistors and methods of manufacturing the same

机译:包括单极热载流子晶体管的半导体器件及其制造方法

摘要

Semiconductor devices comprising one or more gate-controlled unipolar hot-carrier transistors are disclosed having a semiconductor barrier region (3) located between laterally-separated first and second region portions (1,2a) of one conductivity type. The barrier region (3) has a net doping concentration of the opposite conductivity type and is sufficiently thin that the depletion layers formed at zero bias with both the first and second regions (1, 2) merge together substantially to deplete said barrier region (3) of mobile charge carriers. Current flow (12) between the first and second regions (1, 2) is at least partially by thermionic emission of charge carriers of said one conductivity type across the barrier region (3) at a major surface (11) of the body (10). The transistor has a gate (15) in the vicinity of the barrier region (3) and capacitively coupled thereto (for example via dielectric layer (18)) so as to permit the thermionic emission current (12) to be controlled by applying a voltage VGK) to the gate (15) to adjust the effective barrier height of the barrier region (3). Such transistors can be very compact and can have a fast response time with strong gate control. The gate (15) may be located on either side of the barrier region (3), and junction-gates as well as insulated-gates are described.
机译:公开了包括一个或多个栅极控制的单极热载流子晶体管的半导体器件,其具有位于一个导电类型的横向分离的第一区域部分和第二区域部分(1,2a)之间的半导体势垒区域(3)。势垒区(3)具有与导电类型相反的净掺杂浓度,并且足够薄,以使得与第一和第二区(1、2)两者以零偏压形成的耗尽层基本上合并在一起以耗尽所述势垒区(3)。 )的移动电荷载体。在第一和第二区域(1、2)之间的电流(12)至少部分地是通过所述一种导电类型的电荷载流子的热电子发射穿过主体(10)的主表面(11)上的势垒区域(3)而形成的。 )。该晶体管在势垒区(3)附近具有栅极(15)并与之电容耦合(例如通过介电层(18)),从而允许通过施加电压来控制热电子发射电流(12)。 VGK)到栅极(15),以调整势垒区(3)的有效势垒高度。这样的晶体管可以非常紧凑,并且在强大的栅极控制下可以具有快速的响应时间。栅极(15)可以位于势垒区域(3)的任一侧,并且描述了结栅以及绝缘栅。

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