Dynamic semiconductor memory device with balanced sensing arrangement

摘要

A dynamic semiconductor memory device of an open bit-line type includes a plurality of first wiring lines running on common opposite electrodes for forming opposite electrodes of memory cell capacitors and connected to the common opposite electrodes at a number of contact points. A second wiring line is connected to the ends of the first wiring lines and to a voltage supply line at the center point of the second wiring line, so that the potential distribution of the common opposite electrodes can be equalized precisely.