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circuit for minimizing the pertubazioni frequency clock synchronisation phase with a local reference clock circuit
circuit for minimizing the pertubazioni frequency clock synchronisation phase with a local reference clock circuit
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机译:电路,用于通过本地参考时钟电路最小化pertubazioni频率时钟同步相位
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摘要
A frequency disturbance minimization circuit for use in a phase locked loop circuit. A pulse generator eliminates random phase shift, which occurs after a reference clock outage, by synchronizing counted down derivatives of the local and reference clock circuits. A window circuit provides a signal representative of the difference in phase between these local and reference clock circuits. A counter accumulates these phase difference window signals for periodic interrogation by a microprocessor which causes a voltage controlled oscillator to adjust its frequency in the direction necessary to eliminate this phase difference.
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