首页> 外国专利> Semiconductor device and process fabrication thereof

Semiconductor device and process fabrication thereof

机译:半导体器件及其工艺制造

摘要

An insulated-gate field-effect transistor device characterized by the channel region consisting of the intermediate heavily doped portion (50; 72) and two lightly doped portions (46, 48; 74,76) provided on both sides of the heavily doped portion. Such a field-effect transistor device is advantageous in that it provides a surface potential locally increased to act as an energy barrier to minority carriers. This permits control over the threshold voltage of a MOS transistor or over the punch-through current of a punch-through transistor without having recourse to the use of a high carrier density throughout the channel region. The carrier density of the channel region being rather reduced, not only reduction in leakage current but improvement in withstand voltage characteristics can be achieved in a device according to the present invention. Where the transistor device is implemented as a trench- type device, the channel region composed of the differentially doped three portions is formed along a side wall of a trench in the substrate.
机译:一种绝缘栅场效应晶体管器件,其特征在于沟道区由中间的重掺杂部分(50; 72)和设置在重掺杂部分两侧的两个轻掺杂部分(46、48; 74,76)组成。这种场效应晶体管器件的优点在于,它提供了局部增加的表面电势,以作为对少数载流子的能量屏障。这允许控制MOS晶体管的阈值电压或控制穿通晶体管的穿通电流,而不必依赖于在整个沟道区域中使用高载流子密度。在根据本发明的器件中,沟道区的载流子密度被相当地降低,不仅可以减小漏电流,而且可以提高耐压特性。在晶体管器件被实现为沟槽型器件的情况下,由差分掺杂的三个部分组成的沟道区域沿着衬底中的沟槽的侧壁形成。

著录项

  • 公开/公告号US5021845A

    专利类型

  • 公开/公告日1991-06-04

    原文格式PDF

  • 申请/专利权人 TEXAS INSTRUMENTS INCORPORATED;

    申请/专利号US19900547529

  • 发明设计人 MASASHI HASHIMOTO;

    申请日1990-06-29

  • 分类号H01L29/10;H01L29/06;H01L27/01;

  • 国家 US

  • 入库时间 2022-08-22 05:46:25

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号