Comparison device of the write and read timing of a buffer memory -.

摘要

Comparison device of the write and read timing of a buffer memory (1), the said buffer memory - being controlled, for writing and reading, by control means, respectively, of reading and writing, including a counter, respectively, of the writing (4) and (6) is incremented by a clock signal, respectively, of reading and writing, and at least one of these counters being a counter, other than a binary counter, characterized in that this comparison device comprises: & br / - associated with such a counter, a means of a binary counting (11, 13), which is incremented by the same rate as the counter which it is associated, & br / - means (14) of the comparison of binary states from either of two such means of a binary counting, in the case where each of the two counters, for reading and writing, is associated with such a means of a binary counting, or on the one hand, of a binary counter, and secondly, such a means of a binary counting, in the case where one of the two counters, for reading and writing, is a binary counter, and in which the other of these two counters is associated with such a means of a binary counting.