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SEMICONDUCTOR MEMORY DEVICE HAVING A CAPABILITY FOR CONTROLLED ACTIVATION OF SENS AMPLIFIERS

机译:具有用于传感器放大器的受控激活的功能的半导体存储器

摘要

The semiconductor memory device comprises a memory cell array provided with a plurality of sense amplifiers, a pair of first and second drive line segments 44 I , 44 i + 1 , 45 I respectively connected to and connected to the plurality of sense amplifiers for driving the sense amplifiers. , 45 i + 1 ) and a plurality of segmented drive lines 43 i , 43 i + 1, respectively, and a plurality of trunks 50 (i + 1) / 2 , 51 for supplying power to the segmented drive lines. (i + 1) / 2 , 58 (i + 1) / 2 , 58 (i + 1) / 2 ). Each trunk has a first conductor strip extending from the first side of the memory cell array toward the second side to connect to the plurality of first drive line segments when crossing, and to connect to the plurality of second drive line segments when crossing. And a second conductor strip extending from the second side of the memory cell array toward the first side. The first and second conductor strips have a reduced width W 2 and mutual; It has a distal end that has a complementary shape and is arranged to form a straight strip having a substantially constant width W 1 through the memory cell array.
机译:该半导体存储器件包括具有多个读出放大器的存储单元阵列,一对第一和第二驱动线段44 I ,44 i + 1 ,45 < Sub> I 分别连接到并连接到多个感测放大器,以驱动感测放大器。 ,45 i +1 )和多条分段驱动线43 i ,43 i +1,和多个主干50 (i +1)/ 2 ,51用于为分段驱动线供电。 (i +1)/ 2 ,58 (i +1)/ 2 ,58 (i +1)/ 2 )。每个主干具有第一导体带,该第一导体带从存储单元阵列的第一侧向第二侧延伸,以在交叉时连接到多个第一驱动线段,并且在交叉时连接到多个第二驱动线段。从存储单元阵列的第二侧向第一侧延伸的第二导体带。第一和第二导体条具有减小的宽度W 2 ,并且相互之间;它具有远端,该远端具有互补的形状并且被布置为形成穿过存储单元阵列的具有基本上恒定的宽度W 1 的直条。

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