Layout design device and transistor size decisive device of integrated circuit, circuit characteristic evaluation method and transistor size decisive manner

摘要

PROBLEM TO BE SOLVED: To more precisely optimize a transistor size in a time shorter than that of a conventional case in the layout design of an integrated circuit. ;SOLUTION: A diffusion sharing estimating means 11 estimates a place, where diffusion is shared in the layout of the integrated circuit, based on circuit data 31. A circuit characteristic evaluating means 12 estimates and evaluates a characteristic, namely, area, delay and power consumption in the integrated circuit by using information on the diffusion sharing place, which is designated by the diffusion sharing estimating means 11. A transistor optimizing means 13 sets the various sizes of respective transistors in the integrated circuit, gives them to the diffusion sharing estimating means 11 and the circuit characteristic evaluating means 12, and selects the optimum transistor size from transistor size candidates which have been set, based on an estimation evaluation result by the circuit characteristic evaluation means 12. Thus, the transistor size can be decided by considering diffusion sharing, and it is not necessary that transistor decision and compacting be repeated as in a conventional case.;COPYRIGHT: (C)1999,JPO