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Method for polysilicon crystalline line width measurement post etch in undoped-poly process

机译:非掺杂多晶硅工艺中刻蚀后多晶硅晶体线宽的测量方法

摘要

A method of measuring a width of an undoped or lightly doped polysilicon line is disclosed. The width measuring method includes generating carriers in the polysilicon line with an energy source; measuring a capacitance between the polysilicon line and a substrate separated from the polysilicon line by a dielectric layer; and determining a line width of the polysilicon line from the measured capacitance. The capacitance measurement includes connecting first and second probes to the polysilicon line; connecting a third probe to the substrate; connecting a first terminal of a capacitance meter to the first and second probes; connecting a second terminal of the capacitance meter to the third probe; and applying a direct current bias across the first and second probes. A capacitor may be connected between the first and second probes. Further steps include, connecting a fourth probe to a conductor that supports the substrate; and connecting the fourth probe to the third probe.
机译:公开了一种测量未掺杂或轻掺杂多晶硅线的宽度的方法。宽度测量方法包括利用能量源在多晶硅线上产生载流子;测量多晶硅线和通过介电层与多晶硅线隔开的衬底之间的电容;根据测得的电容确定多晶硅线的线宽。电容测量包括将第一和第二探针连接到多晶硅线;以及将第三探针连接至基板;将电容表的第一端子连接到第一和第二探针;将电容表的第二端子连接至第三探针;并在第一和第二探头之间施加直流偏置。电容器可以连接在第一探针和第二探针之间。进一步的步骤包括:将第四探针连接到支撑衬底的导体;并将第四探针连接到第三探针。

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