首页> 外国专利> CAPACITORS IN INTEGRATED CIRCUITS

CAPACITORS IN INTEGRATED CIRCUITS

机译:集成电路中的电容器

摘要

The present invention, in the manufacture of integrated circuits, preferably to create a capacitor having a conductive metal electrode in the capacitor itself and the integrated circuit, to a method for high-frequency applications. According to the invention, the lower electrode (17, 63, 67) is produced by depositing a first metal layer 15 on the layer structure (11) comprising a bottom board and the top insulating layer 13. An insulating layer 19 is a first metal layer of the insulating layer 19. Then, the electrical contact 25 on the lower electrode (17, 63, 67) being via hole 21 is plugged with deposited on 15 by etching via holes 21 through is generated. Then, the first metal layer 15 does not covered in the predetermined region 33, then the dielectric layer 35 is deposited, patterned and etched in such a way that overlaps (39) said predetermined area (33). As a result, the upper electrode (47, 63, 67) and the connecting layer 43 has an upper electrode (47, 63, 67) is deposited on the resultant structure (40) overlaps the predetermined region 33, the connecting layer (43 ) is generated on the second metal layer 41 is patterned and etched in such a manner as to overlap with the plugging of the via hole (21).
机译:本发明,在集成电路的制造中,优选地,提供一种用于高频应用的方法的电容器,该电容器在电容器本身和集成电路中具有导电金属电极。根据本发明,通过在包括底板和顶部绝缘层13的层结构(11)上沉积第一金属层15来制造下部电极(17、63、67)。绝缘层19是第一金属。然后,通过蚀刻通孔21,产生通孔21的下部电极(17、63、67)上的电触点25被插入并沉积在其上的电接触25。然后,第一金属层15没有覆盖在预定区域33中,然后以与所述预定区域(33)重叠(39)的方式沉积,构图和蚀刻介电层35。结果,上电极(47、63、67)和连接层43具有上电极(47、63、67)沉积在所得结构(40)上,该结构与预定区域33重叠,连接层(43)在第二金属层41上产生如图1所示的金属氧化物)以与通孔(21)的塞孔重叠的方式进行图案化和蚀刻。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号