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Output buffer capable of adjusting current drivability and semiconductor integrated circuit device having the same

机译:能够调节电流驱动性的输出缓冲器和具有该缓冲器的半导体集成电路装置

摘要

An output buffer includes first current driving units connected in parallel between a power-supply voltage and an output node; second current driving units connected in parallel between a ground voltage and an output node; a plurality of operation selection circuits setting the respective first and second current driving units to be in either activated or inactivated state in a non-volatile manner; first signal transmission circuits arranged respectively corresponding to the first current driving circuits and each transmitting the level of output data with a similar first propagation time period; and second signal transmission circuits arranged respectively corresponding to the second current driving units and each transmitting the level of the output data with a similar second propagation time period.
机译:输出缓冲器包括并联连接在电源电压和输出节点之间的第一电流驱动单元。在接地电压和输出节点之间并联连接的第二电流驱动单元;多个操作选择电路以非易失性方式将各自的第一电流驱动单元和第二电流驱动单元设置为激活或未激活状态;第一信号传输电路,分别与第一电流驱动电路相对应,并以相似的第一传播时间周期传输输出数据的电平;第二信号传输电路,分别与第二电流驱动单元相对应,并以相似的第二传播时间周期传输输出数据的电平。

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