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Mounting structure of integrated circuit device having high effect of buffering stress and high reliability of connection by solder, and method of mounting the same

机译:具有良好的缓和应力效果和通过焊料进行连接的高可靠性的集成电路器件的安装结构及其安装方法

摘要

A mounting structure of an integrated circuit device includes an integrated circuit device, a mounting board, a first solder bump, and a second solder bump. The integrated circuit device is mounted on the mounting board. The interposer board is interposed between the integrated circuit device and the mounting board. The first solder bump electrically connects the interposer board to the mounting board. The first solder bump is provided between the interposer board and the mounting board. The second solder bump buffers a stress. The second solder bump is provided between the interposer board and the mounting board.
机译:集成电路装置的安装结构包括集成电路装置,安装板,第一焊料凸块和第二焊料凸块。集成电路装置被安装在安装板上。插入板介于集成电路装置和安装板之间。第一焊料凸块将插入器板电连接到安装板。第一焊料凸块设置在内插板和安装板之间。第二焊料凸点缓冲应力。第二焊料凸块设置在内插板和安装板之间。

著录项

  • 公开/公告号US6362437B1

    专利类型

  • 公开/公告日2002-03-26

    原文格式PDF

  • 申请/专利权人 NEC CORPORATION;

    申请/专利号US20000597899

  • 发明设计人 OSAMU ARAI;

    申请日2000-06-19

  • 分类号H05K11/60;

  • 国家 US

  • 入库时间 2022-08-22 00:48:23

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