LAYOUT DATA COMPRESSING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT MANUFACTURED BY APPLYING THE SAME

摘要

PROBLEM TO BE SOLVED: To secure the portability of the data in a state that the hierarchy having no influence on a compression ratio remains, while miniaturizing a chip area by increasing the compression ratio of the layout data of a semiconductor integrated circuit as high as possible.;SOLUTION: A coordinate of the top of a cell frame of the layout data having hierarchy is stored, and a coordinate value and an identifier of an element closest to the top are stored (S1), the coordinate value and the identifier of the element of the same layout data not having hierarchy are stored (S2), the compaction processing is performed on the layout data having hierarchy and the layout data not having hierarchy (S3), whether they are different in the compression ratio or not, is determined (S4), the coordinate value of the moved elements in both layout data is measured (S5), and the cell frames of the elements are displayed by the order of higher moving quantity (S6).;COPYRIGHT: (C)2003,JPO