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Metal gate with PVD amorphous silicon layer and barrier layer for CMOS devices and method of making with a replacement gate process

机译:用于CMOS器件的具有PVD非晶硅层和阻挡层的金属栅极以及用替代栅极工艺制造的方法

摘要

A semiconductor structure and method for making the same provides a metal gate on a silicon substrate. The gate includes a high dielectric constant on the substrate, and a physical vapor deposited (PVD) layer of amorphous silicon on the high k gate dielectric. A barrier layer is deposited on the PVD amorphous silicon layer. The metal is then formed on the barrier layer. The work function of the metal gate is substantially the same as a polysilicon gate due to the presence of the PVD amorphous silicon layer. The barrier layer prevents interaction between the PVD amorphous silicon layer and the metal, thereby allowing higher temperature subsequent processing while preserving the work function of the gate.
机译:半导体结构及其制造方法在硅衬底上提供金属栅极。栅极包括在衬底上的高介电常数,以及在高k栅极电介质上的非晶硅的物理气相沉积(PVD)层。阻挡层沉积在PVD非晶硅层上。然后在阻挡层上形成金属。由于PVD非晶硅层的存在,金属栅极的功函数与多晶硅栅极基本相同。阻挡层防止PVD非晶硅层和金属之间的相互作用,从而允许较高温度的后续处理,同时保留栅极的功函数。

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