首页> 外国专利> Multi-chip package comprises package substrate having bond fingers, first chip having first bonding pads on its center portion, insulating support structures, bonding wire, and second chip with second bonding pads disposed over bonding wire

Multi-chip package comprises package substrate having bond fingers, first chip having first bonding pads on its center portion, insulating support structures, bonding wire, and second chip with second bonding pads disposed over bonding wire

机译:多芯片封装包括具有键合指的封装基板,在其中心部分具有第一键合焊盘的第一芯片,绝缘支撑结构,键合线以及第二键合焊盘设置在键合线上的第二芯片

摘要

A multi-chip package comprises a package substrate (200) having bond fingers (220), a first chip (210) having first bonding pads on its center portion, insulating support structures (260) formed on the first chip, a bonding wire (230) connected between bond fingers and first bonding pads, and a second chip having second bonding pads disposed over the bonding wire and overlying the insulating support structures. A multi-chip package comprises a package substrate having bond fingers, a first chip having first bonding pads on its center portion, insulating support structures formed on the first chip located outward of the first bonding pads, a bonding wire connected between one of the bond fingers and at least one of the first bonding pads, and a second chip having second bonding pads disposed over the bonding wire and overlying the insulating support structures. The first chip is disposed on the package substrate. Independent claims are also included for: (A) a method of forming a multi-chip package, comprising providing a package substrate having bond fingers, mounting a first chip on the package substrate, forming insulating support structures on the first chip located outward of the center bonding pads, electrically connecting one of the bond fingers with center bonding pads using a bonding wire, and stacking a second chip over the bonding wire and overlying the insulating support structures; and (B) a wafer level packaging method comprising providing a wafer having integrated circuit chips, forming insulating support structures on at least one of the chips, and singulating the chips.
机译:一种多芯片封装,包括:具有键合指(220)的封装基板(200),在其中心部分具有第一键合焊盘的第一芯片(210),在第一芯片上形成的绝缘支撑结构(260),键合线( 230)连接在键合指和第一键合焊盘之间,第二芯片具有第二键合焊盘,第二键合焊盘设置在键合线上并覆盖在绝缘支撑结构上。一种多芯片封装,包括:具有键合指的封装基板,在其中央部分具有第一键合焊盘的第一芯片,形成在位于第一键合焊盘之外的第一芯片上的绝缘支撑结构,连接在键合键之间的键合线指状物和第一键合焊盘中的至少一个,以及具有第二键合焊盘的第二芯片,第二键合焊盘设置在键合线上并覆盖在绝缘支撑结构上。第一芯片设置在封装基板上。还包括以下独立权利要求:(A)一种形成多芯片封装的方法,包括提供具有键合指的封装基板,将第一芯片安装在封装基板上,在位于芯片外部的第一芯片上形成绝缘支撑结构。中心键合焊盘,使用键合线将键合指之一与中心键合焊盘电连接,并在键合线上堆叠第二芯片并覆盖绝缘支撑结构; (B)一种晶片级封装方法,包括:提供具有集成电路芯片的晶片;在至少一个所述芯片上形成绝缘支撑结构;以及将所述芯片单片化。

著录项

  • 公开/公告号DE102004018434A1

    专利类型

  • 公开/公告日2004-12-09

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号DE20041018434

  • 发明设计人 KIM DONG-KUK;LEE CHANG-CHEOL;

    申请日2004-04-06

  • 分类号H01L23/50;H01L21/60;H01L25/065;H01L21/56;

  • 国家 DE

  • 入库时间 2022-08-21 22:00:48

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号