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Differential current evaluation circuit and sense amplifier circuit for evaluating a memory state of an SRAM semiconductor memory cell
Differential current evaluation circuit and sense amplifier circuit for evaluating a memory state of an SRAM semiconductor memory cell
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机译:差分电流评估电路和读出放大器电路,用于评估SRAM半导体存储单元的存储状态
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摘要
A differential current evaluation circuit has a differential amplifier and a circuit for setting an input resistance of the current evaluation circuit. The circuit is connected to the outputs and the inputs of the differential amplifier and to signal lines. A sense amplifier circuit has a circuit section, in which a signal is available at an output in a temporally continuous manner even if, after the deactivation of the circuit connected upstream, a signal, in particular a signal supplied by the current evaluation circuit, is no longer present at its input. The differential current evaluation circuit and the sense amplifier circuit are disposed in a circuit configuration for reading out and evaluating a memory state of a semiconductor memory cell. The current evaluation circuit can be activated by a circuit section for automatic deactivation before a read operation and be automatically deactivated directly after the read operation has ended.
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